Title :
Analysis of a source hetrojunction LDMOS device with strained silicon channel
Author :
Fathipour, V. ; Malakoutian, M.A. ; Fathipour, S. ; Fathipour, M.
Author_Institution :
Department of Electrical and Computer Engineering, University of Tehran, Tehran, Iran
Abstract :
In this paper we propose a novel power MOSFET employing a source and drain hetrojunction as well as a thin strained silicon layer at the top of the channel and N-Drift regions. We discuss the physics involved in the operation of this device. Analysis using a 2D device simulator indicates improvements of 36.6%, 22.6% and 10% in current drivability, transconductance and cut off frequency respectively as compared with the traditional LDMOS structure. However, these improvements are accompanied by a suppression of 10% in the break down voltage.
Keywords :
Logic gates; MOSFET circuits; Silicon; Silicon germanium; Threshold voltage; Transconductance; Transistors; (RADIO) HIGH FREQUENCY; POWER MOSFET; SHOT LDMOS;
Conference_Titel :
Electrical Engineering (ICEE), 2011 19th Iranian Conference on
Conference_Location :
Tehran, Iran
Print_ISBN :
978-1-4577-0730-8
Electronic_ISBN :
978-964-463-428-4
