DocumentCode
547960
Title
Analysis of a source hetrojunction LDMOS device with strained silicon channel
Author
Fathipour, Vala ; Malakoutian, M.A. ; Fathipour, S. ; Fathipour, Morteza
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
fYear
2011
fDate
17-19 May 2011
Firstpage
1
Lastpage
1
Abstract
In this paper we propose a novel power MOSFET employing a source and drain hetrojunction as well as a thin strained silicon layer at the top of the channel and N-Drift regions. We discuss the physics involved in the operation of this device. Analysis using a 2D device simulator indicates improvements of 36.6%, 22.6% and 10% in current drivability, transconductance and cut off frequency respectively as compared with the traditional LDMOS structure. However, these improvements are accompanied by a suppression of 10% in the break down voltage.
Keywords
electric breakdown; power MOSFET; semiconductor device manufacture; semiconductor device models; silicon; N-Drift regions; Si; breakdown voltage; current drivability; power MOSFET; source heterojunction LDMOS device; strained silicon channel; thin strained silicon layer; transconductance; (RADIO) HIGH FREQUENCY; POWER MOSFET; SHOT LDMOS;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering (ICEE), 2011 19th Iranian Conference on
Conference_Location
Tehran
Print_ISBN
978-1-4577-0730-8
Type
conf
Filename
5955850
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