Title :
Implementation of parallel full search algorithm for motion estimation on multi-core processors
Author :
Jing, Zhou ; Liangbao, Jiao ; Xuehong, Cao
Author_Institution :
Coll. of Commun. & Inf. Syst., Nanjing Univ. of Post & Telecommun., Nanjing, China
Abstract :
In order to speed up H.264/AVC coding efficiency, this paper proposed a parallelization approach of full search (FS) algorithm for motion estimation on Graphic Processor Unit (GPU) using computing unified device architecture (CUDA). According to the independence among different macro-blocks (MBs), we mapped the traditional sequential FS algorithm for motion estimation to CUDA parallel computing model with optimizing memory usage, taking full advantage of the powerful parallel computing capability to speed up FS motion estimation. Experimental results show that our implementation on CUDA demonstrates substantial improvement up to 50 times than CPU counterpart available and can effectively speed up the FS for motion estimation.
Keywords :
coprocessors; motion estimation; multiprocessing systems; parallel architectures; video coding; CUDA; GPU; H.264/AVC; coding efficiency; computing unified device architecture; graphic processor unit; macro-blocks; motion estimation; multi-core processors; parallel computing; parallel full search algorithm; Algorithm design and analysis; Graphics processing unit; Hardware; Instruction sets; Kernel; Motion estimation; Random access memory; CUDA; Motion estimation; full search algorithm; parallel computing;
Conference_Titel :
Next Generation Information Technology (ICNIT), 2011 The 2nd International Conference on
Conference_Location :
Gyeongju
Print_ISBN :
978-1-4577-0266-2
Electronic_ISBN :
978-89-88678-39-8