Title :
TAB-BackSpace: Unlimited-length trace buffers with zero additional on-chip overhead
Author :
De Paula, Flavio M. ; Nahir, Amir ; Nevo, Ziv ; Orni, Avigail ; Hu, Alan J.
Author_Institution :
Dept. of Comput. Sci., Univ. of British Columbia, Vancouver, BC, Canada
Abstract :
This paper presents TAB-BackSpace, our novel scheme to provide the effect of an unlimited-length trace buffer with no on-chip overhead beyond the existing debug logic. We present the theoretical foundation of our work, simulation studies on how we reduce the possibility of computing an erroneous trace, and results from the bring-up lab on real silicon of an IBM POWER7 processor, where TAB-BackSpace computes almost a thousand additional cycles of trace buffer information without any additional on-chip overhead.
Keywords :
buffer circuits; computer debugging; elemental semiconductors; microprocessor chips; silicon; IBM POWER7 processor; Si; TAB-BackSpace; debug logic; erroneous trace; silicon; unlimited-length trace buffers; zero additional on-chip overhead; Arrays; Computer crashes; Concrete; Hardware; Silicon; System-on-a-chip; Post-silicon debug; design for debug; validation;
Conference_Titel :
Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
Conference_Location :
New York, NY
Print_ISBN :
978-1-4503-0636-2
