DocumentCode
549658
Title
A reuse-aware prefetching scheme for scratchpad memory
Author
Cong, Jason ; Huang, Hui ; Liu, Chunyue ; Zou, Yi
Author_Institution
Comput. Sci. Dept., Univ. of California, Los Angeles, CA, USA
fYear
2011
fDate
5-9 June 2011
Firstpage
960
Lastpage
965
Abstract
Scratchpad memory (SPM) has been utilized as prefetch buffer in embedded systems and parallel architectures to hide memory access latency. However, the impact of reuse pattern on SPM prefetching has not been fully investigated. In this paper we quantify the impact of reuse on SPM prefetching efficiency and propose a reuse-aware SPM prefetching (RASP) scheme. The average performance and energy improvements are 15.9% and 22.0% over cache prefetching, 12.9% and 31.2% over prefetch-only SPM management, 18.5% and 10% over DRDU [1] with SPM prefetching support.
Keywords
cache storage; embedded systems; parallel architectures; performance evaluation; D-cache; I-cache; RASP; embedded systems; memory access latency; parallel architectures; prefetch buffer; reuse-aware SPM prefetching scheme; scratchpad memory; Arrays; Energy consumption; Hidden Markov models; Kernel; Memory management; Prefetching; Resource management; prefetch; reuse; scratchpad memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
Conference_Location
New York, NY
ISSN
0738-100x
Print_ISBN
978-1-4503-0636-2
Type
conf
Filename
5982016
Link To Document