Hermes: An integrated CPU/GPU microarchitecture for IP routing

Author

Zhu, Yuhao ; Deng, Yangdong ; Chen, Yubei

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA

fYear

2011

fDate

5-9 June 2011

Firstpage

1044

Lastpage

1049

Abstract

With the constantly increasing Internet traffic and fast changing network protocols, future routers have to simultaneously satisfy the requirements for throughput, QoS, flexibility, and scalability. In this work, we propose a novel integrated CPU/GPU microarchitecture, Hermes, for QoS-aware high speed routing. We also develop a new thread scheduling mechanism, which significantly improves all QoS metrics.

Keywords

IP networks; Internet; computer graphic equipment; coprocessors; quality of service; scheduling; telecommunication network routing; telecommunication traffic; CPU microarchitecture; GPU microarchitecture; IP routing; Internet traffic; QoS-aware high speed routing; hermes; thread scheduling mechanism; Delay; Graphics processing unit; IP networks; Instruction sets; Quality of service; Throughput; CPU/GPU Integration; QoS; Software Router;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE

Conference_Location

New York, NY

ISSN

0738-100x

Print_ISBN

978-1-4503-0636-2

Type

conf

Filename

5982025

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=549667