• DocumentCode
    549674
  • Title

    A novel junctionless all-around-gate SONOS device with a quantum nanowire on a bulk substrate for 3D stack NAND flash memory

  • Author

    Choi, Sung-Jin ; Moon, Dong-Il ; Duarte, J.P. ; Kim, Sungho ; Choi, Yang-Kyu

  • Author_Institution
    EE, KAIST, Daejeon, South Korea
  • fYear
    2011
  • fDate
    14-16 June 2011
  • Firstpage
    74
  • Lastpage
    75
  • Abstract
    A novel junctionless all-around-gate (AAG) SONOS device with a homogeneously n+-doped silicon nanowire (SiNW) is demonstrated on a bulk substrate. The diameter and gate length of the quantum-scale SiNW are 4 nm and 20 nm, respectively. A deep RIE process is developed for the formation of the SiNWs. The junctionless AAG SONOS device shows a high read current (>; 10 μA), a large VT margin (>; 6.5 V), a narrowed distribution of the erased VT, and improved cyclic endurance (105 cycles). Moreover, the proposed process is applied to implement vertically integrated 9-layer single-crystal SiNWs for 3D NAND.
  • Keywords
    NAND circuits; elemental semiconductors; flash memories; nanowires; silicon; sputter etching; 3D stack NAND flash memory; Si; bulk substrate; deep RIE process; junctionless all-around-gate SONOS device; quantum nanowire; size 20 nm; size 4 nm; vertically integrated 9-layer single-crystal nanowire; Doping; Junctions; Logic gates; SONOS devices; Silicon; Three dimensional displays; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSIT), 2011 Symposium on
  • Conference_Location
    Honolulu, HI
  • ISSN
    0743-1562
  • Print_ISBN
    978-1-4244-9949-6
  • Type

    conf

  • Filename
    5984516