Author :
Hyun, S. ; Han, J. -H ; Park, H. -B ; Na, H. -J ; Son, H.J. ; Lee, H.Y. ; Hong, H. -S ; Lee, H. -L ; Song, J. ; Kim, J.J. ; Lee, J. ; Jeong, W.C. ; Cho, H.J. ; Seo, K.I. ; Kim, D.-W. ; Sim, S.P. ; Kang, S.B. ; Sohn, D.K. ; Choi, Siyoung ; Kang, Hokyu ; Ch
Author_Institution :
Semicond. R&D Center, Samsung Electron., Hwasung, South Korea
Abstract :
An aggressively scaled high-k last metal gate (HKMG) stack was successfully implemented for 20nm high performance and low power applications and even below. Key technologies include aggressive Tinv scaling down to 1.1nm with new HK, suppression of Vfb roll-off, metal layer control for Vt and its excellent uniformity, and metal gate stress engineering for performance improvement.
