DocumentCode
549686
Title
Full metal gate with borderless contact for 14 nm and beyond
Author
Seo, S.-C. ; Edge, L.F. ; Kanakasabapathy, S. ; Frank, M. ; Inada, A. ; Adam, L. ; Wang, M.M. ; Watanabe, K. ; Jamison, P. ; Ariyoshi, K. ; Sankarapandian, M. ; Fan, S. ; Horak, D. ; Li, J.T. ; Vo, T. ; Haran, B. ; Bruley, J. ; Hopstaken, M. ; Brown, S.L.
Author_Institution
IBM Res., Albany, NY, USA
fYear
2011
fDate
14-16 June 2011
Firstpage
36
Lastpage
37
Abstract
Tungsten-based full metal gate (FMG) stacks that are equivalent to or better than metal-inserted poly-Si (MIPS) stack have been developed. These fully encapsulated FMG stacks enable borderless source/drain contacts needed for the 14 nm technology node and beyond, where the contacted gate pitch is expected to be less than 80 nm. Tungsten replaces gate salicidation with the sheet resistance ≤ 14 Ω/□. FMG stack show excellent Tinv scaling (0.92 and 1.15 nm for NFET and PFET, respectively) and enhanced hole mobility by 20% compared to MIPS gate stack. Fully integrated short channel devices and borderless contacts are demonstrated at 80 nm contacted gate pitch.
Keywords
field effect transistors; hole mobility; tungsten; MIPS gate stack; NFET; PFET; W; borderless source-drain contacts; contacted gate pitch; enhanced hole mobility; fully-encapsulated FMG stacks; gate salicidation; metal-inserted polysilicon stack; sheet resistance; size 0.92 nm; size 1.15 nm; size 14 nm; size 80 nm; tungsten-based full metal gate stacks; Lithography; Logic gates; Resistance; Silicon; Tin; Tungsten;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology (VLSIT), 2011 Symposium on
Conference_Location
Honolulu, HI
ISSN
0743-1562
Print_ISBN
978-1-4244-9949-6
Type
conf
Filename
5984620
Link To Document