High performance extremely-thin body III-V-on-insulator MOSFETs on a Si substrate with Ni-InGaAs metal S/D and MOS interface buffer engineering

Author

Kim, S.H. ; Yokoyama, M. ; Taoka, N. ; Iida, R. ; Lee, S. ; Nakane, R. ; Urabe, Y. ; Miyata, N. ; Yasuda, Toshiyuki ; Yamada, H. ; Fukuhara, N. ; Hata, M. ; Takenaka, M. ; Takagi, S.

Author_Institution

Dept. of Electr. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan

fYear

2011

fDate

14-16 June 2011

Firstpage

58

Lastpage

59

Abstract

We have demonstrated the extremely thin body (ETB) In_0.7Ga_0.3As-on-insulator (-OI) MOSFETs on Si substrates with Ni-InGaAs S/D structures. It has been found that low doping concentrations, In-rich channels (In_0.7Ga_0.3As), and buffer engineering provide high mobility of 2810 cm²/Vs even the total InGaAs thickness of 10 nm. This is the first demonstration of ETB III-V-OI MOSFETs combined with the Schottky-barrier free metal S/D technology. We have also achieved excellent I_D-V_G characteristics with I_on/I_off ratio of over 10⁷ and low S.S. of 103 mV/dec in 2/1/3 nm-thick InGaAs MOSFETs with buffer layers.

Keywords

III-V semiconductors; MOSFET; Schottky barriers; elemental semiconductors; gallium compounds; indium compounds; nickel; semiconductor-insulator boundaries; silicon; ETB III-V-OI MOSFET; MOS interface buffer engineering; Ni-InGaAs; Schottky-barrier free-metal S-D technology; Si; buffer layers; doping concentrations; high-performance extremely-thin body III-V-on-insulator MOSFET; metal S-D structures; silicon substrate; size 10 nm; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSIT), 2011 Symposium on

Conference_Location

Honolulu, HI

ISSN

0743-1562

Print_ISBN

978-1-4244-9949-6

Type

conf

Filename

5984631