Title :
Impact of back bias on ultra-thin body and BOX (UTBB) devices
Author :
Liu, Q. ; Monsieur, F. ; Kumar, A. ; Yamamoto, T. ; Yagishita, A. ; Kulkarni, P. ; Ponoth, S. ; Loubet, N. ; Cheng, K. ; Khakifirooz, A. ; Haran, B. ; Vinet, M. ; Cai, J. ; Kuss, J. ; Linder, B. ; Grenouillet, L. ; Mehta, S. ; Khare, P. ; Berliner, N. ; L
Author_Institution :
Albany NanoTech, STMicroelectronics, Albany, NY, USA
Abstract :
We present a detailed study of back bias (Vbb) impact on UTBB devices with a gate length (LG) of 25nm and BOX thicknesses (TBOX) of 25nm and 10nm, respectively. It is reported for the first time that the Vt is modulated by Vbb across a wide temperature range, from -40°C to 125°C. The device electrostatics and reliability, under various Vbb are investigated. The short channel effect (SCE) is well maintained across the bias points. NFET GIDL and HCI both improve when negative bias is applied. The Vbb effect on ring oscillators´ (ROs) performance, based on 100nm contacted gate pitch (CPP), and on a 0.08μm2 6-T SRAM, based on 80nm CPP, are reported for the first time. Clear RO performance/leakage tradeoff and SRAM static noise margin (SNM) modulation by Vbb are observed. SNM of 206mV is achieved at Vdd=0.9V.
Keywords :
SRAM chips; integrated circuit reliability; oscillators; 6-T SRAM; BOX thicknesses; CPP; HCI; NFET GIDL; RO performance; SCE; SNM modulation; TBOX; UTBB devices; back bias impact; contacted gate pitch; device electrostatics; device reliability; ring oscillators; short channel effect; size 10 nm; size 100 nm; size 25 nm; size 80 nm; static noise margin modulation; temperature -40 degC to 125 degC; ultrathin body-and-BOX devices; voltage 0.9 V; voltage 206 mV; Delay; Human computer interaction; Logic gates; Modulation; Random access memory; Reliability; Temperature distribution;
Conference_Titel :
VLSI Technology (VLSIT), 2011 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-9949-6
