Author :
Amirkhany, A. ; Wei, J. ; Mishra, N. ; Shen, J. ; Beyene, W. ; Chin, T. ; Huang, C. ; Gadde, V. ; Kaviani, K. ; Le, P. ; M, M. ; Madden, C. ; Mukherjee, S. ; Raghavan, L. ; Saito, K. ; Secker, D. ; Shuaeb, F. ; Srinivas, S. ; Wu, T. ; Tran, C. ; Vaidyanat
Author_Institution :
Rambus Inc., Sunnyvale, CA, USA
Abstract :
A single-ended (SE) memory interface utilizing a compact voltage-mode (VM) driver and equalizer, and a reference-voltage (VREF) noise tracking system achieves 12.8-Gbps per pin data rate. Same interface can also communicate with 6.4-Gbps GDDR5 and 1.6-Gbps DDR3 DRAM with no package change. Implemented in a 40-nm CMOS process, the x16 tri-modal interface achieves an energy efficiency of better than 5.0-mW/Gbps per data link at 12.8-Gbps.
Keywords :
CMOS memory circuits; DRAM chips; computer graphics; equalisers; peripheral interfaces; CMOS; DDR3 DRAM; GDDR5 DRAM; bit rate 12.8 Gbit/s; compact voltage-mode driver; equalizer; graphics application; reference-voltage noise tracking system; trimodal single-ended memory interface; Calibration; Equalizers; Impedance; Noise; Random access memory; Receivers; Very large scale integration;
