DocumentCode :
549804
Title :
Circuit challenges for future computing systems
Author :
Dally, William J.
Author_Institution :
NVIDIA and Stanford University, USA
fYear :
2011
fDate :
15-17 June 2011
Firstpage :
100
Lastpage :
103
Abstract :
Future computing systems from application processors in mobile devices to high-end supercomputers face fundamental challenges of power, bandwidth, and synchronization. The power dissipation of these systems will be dominated by communication and clocking. Bandwidth, both on-chip, and off-chip will be a major limit to system performance. Conventional synchronous systems will become increasingly costly in terms of both cycle-time overhead and energy. A combination of novel architecture and efficient circuits can help meet these challenges. This talk will discuss the challenges of power, bandwidth, and synchronization in more detail and present some potential solutions for each challenge.
Keywords :
mainframes; microprocessor chips; power aware computing; synchronisation; application processors; clocking; cycle time overhead; future computing system; high-end supercomputer; mobile devices; off-chip bandwidth; on-chip bandwidth; power dissipation; synchronization; Bandwidth; Program processors; Switches; Synchronization; System-on-a-chip; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits (VLSIC), 2011 Symposium on
Conference_Location :
Honolulu, HI
ISSN :
2158-5601
Print_ISBN :
978-1-61284-175-5
Type :
conf
Filename :
5986058
Link To Document :
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