Title :
A 2.6mW/Gbps 12.5Gbps RX with 8-tap switched-cap DFE in 32nm CMOS
Author :
Toifl, Thomas ; Menolfi, Christian ; Ruegg, Michael ; Reutemann, Robert ; Prati, Andrea ; Gardellini, Daniele ; Brandli, Matthias ; Kossel, Marcel ; Buchmann, Peter ; Francese, Pier Andrea ; Morf, Thomas
Author_Institution :
IBM Res. GmbH, Zurich, Switzerland
Abstract :
A 12.5Gb/s receiver circuit with 8-tap decision feedback equalizer (DFE) is presented, which consumes only 2.6mW/Gb/s, and was measured to receive data error-free over a channel with -27dB attenuation. The receiver uses a switched-capacitor (SC) approach for the DFE, where charge is added to the summation node by switching digitally adjustable capacitances dependent on the received data history.
Keywords :
CMOS integrated circuits; capacitance; decision feedback equalisers; CMOS; SC approach; attenuation; bit rate 12.5 Gbit/s; data error-free; decision feedback equalizer; digitally adjustable capacitances; power 2.6 mW; received data history; receiver circuit; size 32 nm; summation node; switched-cap DFE; switched-capacitor approach; Attenuation; CMOS integrated circuits; Clocks; Decision feedback equalizers; Layout; Receivers; Switches;
Conference_Titel :
VLSI Circuits (VLSIC), 2011 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-61284-175-5
