Isolation techniques against substrate noise coupling utilizing through silicon via (TSV) for RF/mixed-signal SoCs

Isolation techniques against substrate noise coupling utilizing TSV processes are proposed. The TSV encloses the RF circuit on a SoC chip to improve the isolation between digital circuits and the RF circuit without constraints of on-chip interconnect above the TSV. Various test patterns are fabricated on a CMOS 10Ωcm silicon substrate. The combinational pattern with TSV, DTI and HR layer shows 60dB improvement of the isolation. Both simplified model and mesh equivalent model are well matched with measurement results.