DocumentCode
549899
Title
A reconfigurable 1GSps to 250MSps, 7-bit to 9-bit highly time-interleaved counter ADC in 0.13µm CMOS
Author
Danesh, Seyed ; Hurwitz, Jed ; Findlater, Keith ; Renshaw, David ; Henderson, Robert
Author_Institution
Sch. of Eng. & Electron. of, Edinburgh Univ., Edinburgh, UK
fYear
2011
fDate
15-17 June 2011
Firstpage
268
Lastpage
269
Abstract
A reconfigurable highly time-interleaved ADC is realized by combining 128 counter ADCs and a global ramp-generator based on a rotating figure-of-8 resistor ring. Implemented in 0.13μm CMOS, the ADC can be configured in real-time as a 1GSps 7-bit, 500MSps 8-bit, and 250MSps 9-bit converter. It achieves sub 400fJ/step in all these configurations.
Keywords
CMOS integrated circuits; analogue-digital conversion; convertors; ramp generators; 9-bit converter; CMOS; bit rate 1 Gbit/s; counter ADC; global ramp-generator; reconfigurable highly time-interleaved ADC; resistor ring; size 0.13 mum; Bandwidth; CMOS integrated circuits; Capacitance; Clocks; Generators; Radiation detectors; Random access memory; TIC ADC; Time Interleaved Counter ADC;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSIC), 2011 Symposium on
Conference_Location
Honolulu, HI
ISSN
2158-5601
Print_ISBN
978-1-61284-175-5
Type
conf
Filename
5986447
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