• DocumentCode
    550618
  • Title

    Single FPGA-based optimization of MVB universal interface

  • Author

    Deng Jiang-Ming ; Chen Te-fang ; Cheng Shu

  • Author_Institution
    Coll. of Sci. Inf. & Technol., Central South Univ., Changsha, China
  • fYear
    2011
  • fDate
    22-24 July 2011
  • Firstpage
    4377
  • Lastpage
    4381
  • Abstract
    In order to expand compatibility of on-board, on-board with out-board equipments, and improve capacity of data exchange between MVB(Multifunction Vehicle Bus) and other external buses, it used a single FPGA to realize the universal interface in which both the MVB interface and other variety of communication bus interfaces are included. It used ARM to load multiple-communication protocols upon FPGA automatically. For influence of high frequency noises and signal synchronous slip, transmission signal waveforms existed certain degree of nonlinear distortion, which would cause data transmission failure in the worst case. To avoid those cases, the interface adopted an nonlinear signal discretization compensation strategy. The real time dynamic compensations were calculated each cycle by a high speed digital controller. The final test results show that it is feasible for a single FPGA realizing universal interface function of communication, and after compensation the signal waveforms gain great improvement.
  • Keywords
    data communication; electronic data interchange; field buses; field programmable gate arrays; microcontrollers; nonlinear distortion; optimisation; protocols; railway engineering; ARM; MVB universal interface; communication bus interfaces; data exchange; data transmission failure; high frequency noise; multifunction vehicle bus; multiple-communication protocol; nonlinear distortion; nonlinear signal discretization; signal synchronous slip; single FPGA-based optimization; transmission signal waveforms; Educational institutions; Electronic mail; Field programmable gate arrays; Random access memory; Read only memory; Universal Serial Bus; Vehicles; FPGA; MVB Bus; Nonlinear Compensation; Universal Interface;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Control Conference (CCC), 2011 30th Chinese
  • Conference_Location
    Yantai
  • ISSN
    1934-1768
  • Print_ISBN
    978-1-4577-0677-6
  • Electronic_ISBN
    1934-1768
  • Type

    conf

  • Filename
    6000957