Determination of all feasible robust pid controllers for open-loop unstable plus time delay systems with gain margin and phase margin specifications

This paper proposes a novel graphical method to compute all feasible gain and phase margin specifications-oriented robust PID controllers to stabilize unstable plus time delay processes. A virtual gain-phase margin tester compensator is incorporated to guarantee the concerned system with certain robust safety margins. The stability equation method and the parameter plane method are exploited to portray stability boundary and constant gain margin boundary as well as constant phase margin boundary. All feasible robust stabilizing PI controllers for the considered unstable plus time delay processes are graphically determined in the parameter plane by taking the overlapped region of the plotted boundaries. Finally, an illustrative example with computer simulations is provided to demonstrate the effectiveness and confirm the validity of the proposed methodology. Based on the pre-specified gain and phase margin specifications, a non-conservative gain and phase margin specifications-oriented region can be graphically identified directly in the parameter plane for designing robust PI controllers.