DocumentCode
552280
Title
Low-power consumption DSP circuit design for IFDMA-based PON systems
Author
Ishii, Kenji ; Akiyama, Yuji ; Yoshida, Tsuyoshi ; Suzuki, Naoki ; Ichikawa, Toshiyuki ; Koguchi, Kazuumi ; Nakagawa, Junichi ; Mizuochi, Takashi ; Yoshida, Yuki ; Maruta, Akihiro ; Kitayama, Ken-ichi
Author_Institution
Inf. Technol. R&D Center, Mitsubishi Electr. Corp., Kamakura, Japan
fYear
2011
fDate
4-8 July 2011
Firstpage
770
Lastpage
771
Abstract
We present new IFDMA-based PON systems employing a low power SRAM-based DSP circuits for over 10 Gb/s-capable PON. Its power reduction effect of more than 93 % compared to FFT/IFFT-based OFDMA-PON systems was demonstrated in real circuits on FPGA.
Keywords
SRAM chips; digital signal processing chips; fast Fourier transforms; field programmable gate arrays; frequency division multiple access; inverse transforms; passive optical networks; FFT-IFFT-based OFDMA-PON system; FPGA; IFDMA-based PON system; SRAM-based DSP circuits; bit rate 10 Gbit/s; low-power consumption DSP circuit design; power reduction effect; Digital signal processing; Frequency conversion; Frequency division multiplexing; Frequency modulation; OFDM; Passive optical networks;
fLanguage
English
Publisher
ieee
Conference_Titel
Opto-Electronics and Communications Conference (OECC), 2011 16th
Conference_Location
Kaohsiung
Print_ISBN
978-1-61284-288-2
Electronic_ISBN
978-986-02-8974-9
Type
conf
Filename
6015365
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