Title :
A method of voltage limiting and distortion avoidance for islanded inverter-fed networks under fault
Author :
Plet, C.A. ; Green, T.C.
Author_Institution :
Imperial Coll. London, London, UK
fDate :
Aug. 30 2011-Sept. 1 2011
Abstract :
Inverter current limiting in islanded networks during unbalanced faults can cause voltage distortion. By using the control system to emulate a parallel impedance, this distortion can be avoided whilst current control is maintained and fault current is delivered to the fault. Experimental results from a 10kVA inverter system are provided to verify the theoretical analysis that has been developed.
Keywords :
fault current limiters; harmonic distortion; invertors; power system control; apparent power 10 kVA; control system; current control; distortion avoidance; fault current; inverter current limiting; islanded inverter-fed networks; parallel impedance; unbalanced faults; voltage distortion; voltage limiting; Control systems; Harmonic distortion; Impedance; Inductors; Inverters; Limiting; Voltage control; Distributed Generation; Fault; Harmonic Distortion; Inverter; Microgrid; Voltage Limiting;
Conference_Titel :
Power Electronics and Applications (EPE 2011), Proceedings of the 2011-14th European Conference on
Conference_Location :
Birmingham
Print_ISBN :
978-1-61284-167-0
Electronic_ISBN :
978-90-75815-15-3
