• DocumentCode
    556366
  • Title

    A novel simulation environment enabling multilevel power estimation of digital systems

  • Author

    Nagy, Gergely ; Poppe, András

  • Author_Institution
    Dept. of Electron Devices, Budapest Univ. of Technol. & Econ., Budapest, Hungary
  • fYear
    2011
  • fDate
    27-29 Sept. 2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper presents a novel logi-thermal simulator architecture. A logi-thermal simulator encorporates a logic and a thermal core in strong coupling. It is capable of calculating the self-heating of digital blocks and is able to account for the consequences of temperature change by implementing the delays of the blocks as a function of the temperature. The simulator architecture presented is able to work with logic entities described at different levels of abstraction. This allows to simulate a design at a very early phase when only high-level descriptions are available or to simulate systems that have elements in different design phases. Such a feature enables engineers to perform logi-thermal simulation throughout almost the entire design process which allows for the application of multiple-level optimization. It can also be used to shorten simulation times when only some parts of the design need to be simulated in high detail.
  • Keywords
    circuit optimisation; logic circuits; logic simulation; thermal analysis; digital systems; logi-thermal simulator architecture; logic core; logic elements; multilevel power estimation; multiple-level optimization; thermal core; Delay; Engines; Estimation; Integrated circuit modeling; Layout; Logic gates; Vectors; electro-thermal simulation; logi-thermal simulation; multilevel simulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Thermal Investigations of ICs and Systems (THERMINIC), 2011 17th International Workshop on
  • Conference_Location
    Paris
  • Print_ISBN
    978-1-4577-0778-0
  • Type

    conf

  • Filename
    6081015