FI4SoC: A fault injection framework for transient fault effects in embedded MPSoCs

Transient faults are an important threat for Multi-Processor System-on-Chips (MPSoCs) deployed in embedded systems. Using fault injection, it is possible to assess the vulnerability against these faults at early development stages as recommended by safety standards such as IEC 61508. This paper presents the FI4SoC fault injection framework which is specifically designed for investigating the effects of transient faults in MPSoCs, which are based on a message-based network-on-chip. Such MPSoC architectures are well-suited for embedded systems, because message passing as the basic interaction mechanism of an MPSoC provides better temporal predictability, fault containment and energy efficiency compared to shared memories. The presented framework performs hardware emulation using partial reconfiguration into Xilinx Virtex-4 FPGAs and supports fault injection at logical level. For observing the fault-induced behavior, the messages on the network-on-chip are observed and classified. We introduce an approach that does not require modifications of IP cores and significantly reduces the amount of data to be analyzed, as well as the state space for testing.