DocumentCode
556822
Title
The study of FG formation for nano-scale NAND flash memory cells
Author
Feng, Marvin
Author_Institution
Powerchip Technology Corporation, Module Technology Division, Diffusion Technology Group
fYear
2011
fDate
5-6 Sept. 2011
Firstpage
1
Lastpage
10
Abstract
A collection of slides about FG morphology requirement for data retention, FG morphology control related issue, spin-on dielectric (SOD) process induced pin hole issue and phosphorus concentration pilling-up at FG/Tox interface is presented.
Keywords
NAND circuits; flash memories; FG morphology control; data retention; nano-scale NAND flash memory cells; phosphorus concentration pilling-up; spin-on dielectric process induced pin hole; Collaboration; Dielectrics; Joints; Logic gates; Manufacturing; Morphology; Process control;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing (ISSM) and e-Manufacturing and Design Collaboration Symposium (eMDC), 2011 International Symposium on
Conference_Location
Hsinchu
ISSN
1523-553X
Print_ISBN
978-1-4577-1647-8
Type
conf
Filename
6086049
Link To Document