A fractional-N PLL spur and phase noise simulator

Fractional-N PLLs are widely used in today´s communication systems. While there is a huge demand on good phase noise performance, low spurious emission is also a must. State-of-the-art simulation tools cannot simulate spurs on transistor level due to time and memory restrictions. However, the knowledge of the precise transistor level charge pump linearity is essential for any spur simulation. This paper presents a spur simulator, which is able to predict fractional-N PLL spurs with high accuracy. It considers transistor level charge pump simulations in order to calculate both fractional spurs and reference spurs. Moreover, also coupling spurs are considered. The simulator has been written in Python programming language and includes a graphical user interface. Speed critical parts have been programmed using C/C++ extensions.