DocumentCode :
558491
Title :
A 100-GHz balanced FET frequency doubler in 65-nm CMOS
Author :
Varonen, Mikko ; Kärkkäinen, Mikko ; Sandström, Dan ; Halonen, Kari A I
Author_Institution :
Dept. of Micro & Nanosci., Aalto Univ., Espoo, Finland
fYear :
2011
fDate :
10-11 Oct. 2011
Firstpage :
105
Lastpage :
107
Abstract :
This paper demonstrates a W-band CMOS frequency doubler which utilizes a balanced topology in order to achieve a wideband fundamental suppression. The required 180-degree phase shift is obtained by employing a spiral transmission line balun. At 100 GHz the measured conversion loss of the frequency doubler is 16 dB using an input power of +5 dBm. The fundamental suppression is better than 25 dB from 42 to 55 GHz.
Keywords :
CMOS analogue integrated circuits; baluns; field effect MIMIC; frequency multipliers; millimetre wave phase shifters; network topology; 180-degree phase shift; W-band CMOS frequency doubler; balanced FET frequency doubler; balanced topology; conversion loss; frequency 100 GHz; size 65 nm; spiral transmission line balun; wideband fundamental suppression; CMOS integrated circuits; Frequency measurement; Harmonic analysis; Impedance matching; Loss measurement; Microwave circuits; Microwave integrated circuits; CMOS; MMICs; frequency doublers; frequency multiplication; millimeter-wave integrated circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Integrated Circuits Conference (EuMIC), 2011 European
Conference_Location :
Manchester
Print_ISBN :
978-1-61284-236-3
Type :
conf
Filename :
6102812
Link To Document :
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