DocumentCode
559973
Title
Image Processing in Dynamic Reconfigurable Platform
Author
Li Wancai ; Chen JianYong ; Li Zhenyu
Author_Institution
Image Intell. Inf. Process. Lab., Third Res. Inst. of Minist. of Public Security, Shanghai, China
Volume
3
fYear
2011
fDate
24-25 Sept. 2011
Firstpage
127
Lastpage
130
Abstract
With the increasing requirement of processing power in image processing, it is important to provide a real time, low-cost, and high performance platform. This paper presents a general-purpose FPGA-based dynamic reconfigurable platform for image processing. It uses the FPGA´s powerful parallel processing architecture to implement the acceleration of the image algorithm. Based on the proposed system level architecture, our system includes different functional modules, such as edge detection and image filtering, which provides the flexibility for the system. According to the different application requirements, this design strategy can dynamic reconfigure the functional modules on line. Its hardware efficiency and software flexibility have been shown by the functional verification of the edge detection and image filtering algorithm on the Virtex-4 development platform.
Keywords
edge detection; field programmable gate arrays; filtering theory; image processing; parallel processing; FPGA based dynamic reconfigurable platform; Virtex-4 development platform; edge detection; hardware efficiency; image algorithm; image filtering; image processing; parallel processing architecture; power processing; software flexibility; Application specific integrated circuits; Field programmable gate arrays; Filtering; Hardware; Image edge detection; Software; FPGA; dynamic reconfiguration; edge detection; image filtering; image processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Technology, Computer Engineering and Management Sciences (ICM), 2011 International Conference on
Conference_Location
Nanjing, Jiangsu
Print_ISBN
978-1-4577-1419-1
Type
conf
DOI
10.1109/ICM.2011.147
Filename
6113601
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