Title :
An early performance analysis of POWER7-IH HPC systems
Author :
Barker, Kevin J. ; Hoisie, Adolfy ; Kerbyson, Darren J.
Author_Institution :
Performance & Archit. Lab., Pacific Northwest Nat. Lab., Richland, WA, USA
Abstract :
In this work we present a performance evaluation of the POWER7-IH processor and of integrated systems built from it. We describe the architecture of P7-IH with an emphasis on those characteristics that have a direct impact on the performance for large-scale HPC systems and applications. An important area of emphasis is the memory and communication subsystems and their impact on achievable application performance. The results from a set of micro-benchmarks are presented that include memory, communication and OS-noise characteristics. In addition the results from several production level applications are analyzed and their performance linked to the results of the micro-benchmarks through the use of accurate performance models. The models will also be employed in exploring the achievable performance of these applications on much larger systems.
Keywords :
microprocessor chips; performance evaluation; power aware computing; POWER7-IH HPC systems; communication subsystems; early performance analysis; integrated systems; memory subsystem; microbenchmark set; performance evaluation; Aggregates; Atmospheric modeling; Bandwidth; Computer architecture; Large-scale systems; Noise; Tin; Applications; Benchmarking; High Performance Computing; Performance Modeling;
Conference_Titel :
High Performance Computing, Networking, Storage and Analysis (SC), 2011 International Conference for
Conference_Location :
Seatle, WA
Electronic_ISBN :
978-1-4503-0771-0
