DocumentCode
560458
Title
Immunity evaluation of SRAM core using DPI with on-chip diagnosis structures
Author
Sawada, Takuya ; Toshikawa, Taku ; Yoshikawa, Kumpei ; Takata, Hidehiro ; Nii, Koji ; Nagata, Makoto
Author_Institution
Grad. Sch. of Syst. Inf., Kobe Univ., Kobe, Japan
fYear
2011
fDate
6-9 Nov. 2011
Firstpage
65
Lastpage
70
Abstract
A direct power injection (DPI) method evaluates the immunity of a static random access memory (SRAM) core in a 90 nm CMOS technology, with on-die diagnosis structures of memory built-in self test (MBIST) and on-chip voltage waveform monitoring (OCM). The magnitude of sinusoidal voltage variation introduced by DPI is quantified by OCM. The number of resultant erroneous bits as well as their distribution in the cell array is given by MBIST. The DPI, OCM, and MBIST co-operate for the immunity diagnosis of an SRAM core, as a function of power and frequency of injection. The frequency-dependent sensitivity reflects the highly capacitive nature of densely integrated memory cells.
Keywords
CMOS memory circuits; SRAM chips; built-in self test; electromagnetic interference; immunity testing; integrated circuit testing; CMOS technology; DPI; MBIST; SRAM core immunity evaluation; densely integrated memory cell; direct power injection method; memory built-in self test; on chip diagnosis structures; on die diagnosis structures; on-chip voltage waveform monitoring; sinusoidal voltage variation; size 90 nm; static random access memory; Arrays; Electromagnetic compatibility; Electromagnetic interference; Radio frequency; Random access memory; System-on-a-chip; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility of Integrated Circuits (EMC Compo), 2011 8th Workshop on
Conference_Location
Dubrovnik
Print_ISBN
978-1-4577-0862-6
Type
conf
Filename
6130052
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