DocumentCode :
560473
Title :
Evaluation of power supply noise reduction by implementing on-chip capacitance
Author :
Fujii, Hideyuki ; Kobayashi, Yoshinori ; Sudo, Toshio
Author_Institution :
Shibaura Inst. of Technol., Tokyo, Japan
fYear :
2011
fDate :
6-9 Nov. 2011
Firstpage :
219
Lastpage :
223
Abstract :
On-chip decoupling capacitor works to reduce on-chip power supply fluctuation by localizing switching current inside chip. This results in the reduction of electromagnetic interference (EMI) by preventing switching current with high frequency components flowing out from the chip. In this paper, a test chip with on-chip decoupling capacitance and noise generating circuits has been reported using CMOS 0.18 μm process. Shoot-through current generator was designed to excite impulse type noise generation. Effects of on-chip capacitance on noise reduction ware evaluated by measuring the test chip as well as by using power supply noise analysis tool. Power supply noise reduction has been quantitatively evaluated by both experiment and analysis.
Keywords :
CMOS integrated circuits; capacitors; electromagnetic interference; microprocessor chips; power supply circuits; CMOS process; electromagnetic interference; impulse type noise generation; localizing switching current; noise generating circuits; on-chip decoupling capacitance; on-chip decoupling capacitor; on-chip power supply fluctuation; power supply noise reduction; shoot-through current generator; Capacitance; Fluctuations; Noise; Noise generators; Power supplies; Switches; System-on-a-chip; CMOS test chips; on-chip capacitance; power supply noise; shoot-through current generator;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility of Integrated Circuits (EMC Compo), 2011 8th Workshop on
Conference_Location :
Dubrovnik
Print_ISBN :
978-1-4577-0862-6
Type :
conf
Filename :
6130067
Link To Document :
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