DocumentCode
560825
Title
Flying adder principle frequency synthesizer
Author
Stork, Milan
Author_Institution
Dept. Appl. Electron. & Telecommun., Univ. of West Bohemia, Plzen, Czech Republic
fYear
2011
fDate
1-4 Dec. 2011
Abstract
The frequency synthesis is one of the most important and most actively researched subjects in the field of VLSI mixed-signal circuit design. Among the existing techniques in this area, phase locked loop fractional architecture is a widely used one for generating frequencies which are not integer multiple of the input reference frequency. Flying-Adder architecture is an emerging technique which is based on a new concept time-average-frequency, to generate frequencies. This paper presents simple fractional frequency synthesizer architecture based on concept flying-adder and phase locked loop principle. The simulation results concerning this approach are presented.
Keywords
adders; frequency synthesizers; phase locked loops; VLSI mixed-signal circuit design; flying adder principle; flying-adder architecture; frequency synthesizer; phase locked loop fractional architecture; time-average-frequency; Adders; Frequency control; Frequency conversion; Frequency division multiplexing; Frequency synthesizers; Phase locked loops; Synthesizers;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Electronics Engineering (ELECO), 2011 7th International Conference on
Conference_Location
Bursa
Print_ISBN
978-1-4673-0160-2
Type
conf
Filename
6140178
Link To Document