• DocumentCode
    560995
  • Title

    High speed bending of 2nd level interconnects on printed circuit boards for automotive electronics

  • Author

    Kouters, M.H.M. ; Ubachs, R. ; van de Wiel, H.J. ; van der Waal, A. ; van der Veer, J.

  • Author_Institution
    Mater. Performance Group, TNO Tech. Sci., Eindhoven, Netherlands
  • fYear
    2011
  • fDate
    12-15 Sept. 2011
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    Standard drop tests for portable electronics are not representative for the qualification of automotive electronics. High-frequency vibrations are more dominant than abrupt shocks during normal operation. In this work a high speed board bending (HSB) method is developed to mimic the constant cyclic solder joint loading (sinus wave load, 10-200 Hz, <;2 mm peak-to-peak). A series of test printed circuit boards with wafer level chip scale packages (WLCSP) and Micropearl SOL lead-free solder balls arrays are daisy-chain interconnected and in-situ monitored to detect failure during loading. After failure defect interconnects are cross sectioned for fractography to determine the corresponding failure mechanism. To determine the maximum stress and strain levels finite element modeling (FEM) is used and compared with the results from HSB testing. Finally, a proof of concept is done for the high speed bending test. Further verification is necessary to use this test as qualification for 2nd level interconnect qualification of automotive electronics.
  • Keywords
    automotive electronics; chip scale packaging; finite element analysis; impact testing; integrated circuit interconnections; printed circuit manufacture; solders; vibrations; wafer level packaging; 2nd level interconnects; Micropearl SOL lead-free solder balls arrays; WLCSP; automotive electronics; constant cyclic solder joint loading; failure defect interconnects; finite element modeling; fractography; high speed bending; high speed board bending; high-frequency vibrations; portable electronics; printed circuit boards; standard drop tests; wafer level chip scale packages; Copper; Lead; Polymers; Position measurement; Silicon; Solid modeling; Three dimensional displays; 2nd level interconnect; FE modeling; PCB; bending; mechanical; vibration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics and Packaging Conference (EMPC), 2011 18th European
  • Conference_Location
    Brighton
  • Print_ISBN
    978-1-4673-0694-2
  • Type

    conf

  • Filename
    6142372