DocumentCode :
562348
Title :
Fault detection of system level SoC model
Author :
Hahanov, Vladimir ; Litvinova, Eugenia ; Hahanova, Yulia ; Gharibi, Wajeb
fYear :
2012
fDate :
21-24 Feb. 2012
Firstpage :
290
Lastpage :
290
Abstract :
The effective process models and methods for diagnosing the functional failures in software and/or hardware are offered. The register or matrix (tabular) data structures, focused to parallel execution of logic operations, are used for detecting the faulty components.
Keywords :
data structures; object-oriented programming; parallel processing; program diagnostics; system-on-chip; fault detection; faulty component detection; hardware functional failure diagnosis; logic operations; matrix data structures; parallel execution; process models; register data structures; software functional failure diagnosis; system level SoC model; tabular data structures; IP networks; Software; HDL-model; Infrastructure IP; testing; verification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Modern Problems of Radio Engineering Telecommunications and Computer Science (TCSET), 2012 International Conference on
Conference_Location :
Lviv-Slavske
Print_ISBN :
978-1-4673-0283-8
Type :
conf
Filename :
6192565
Link To Document :
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