Title :
Design of low power ALU using 8T FA and PTL based MUX circuits
Author :
Nehru, K. ; Shanmugam, A. ; Thenmozhi, G. Darmila
Author_Institution :
ECE Dept., Bannari Amman Inst. of Technol., Erode, India
Abstract :
In this paper we proposed an ALU using Novel 8T full adder and Pass transistor logic based multiplexers. A 4×1 and a 2×1 multiplexer were used to design an ALU. Full adder is an essential component for designing all types of processors like digital signal processors (DSP), microprocessors etc. In existing method full adder and multiplexers were designed using transmission gate logic. To reduce the number of transistors multiplexers were designed using pass transistor logic and the full adder is designed using 8 transistors. Full adder is designed using 8 transistor logic and multiplexers were designed using pass transistor logic and this is used in the implementation of ALU. In the implementation of ALU, the power and the area were greatly reduced to more than 70% compared to the existing method.
Keywords :
adders; logic design; logic gates; low-power electronics; multiplexing equipment; network synthesis; transistor circuits; 8-transistor logic; 8T FA-based MUX circuit; 8T full adder-based multiplexer; PTL-based MUX circuits; area reduction; arithmetic logic unit; low-power ALU design; pass transistor logic-based multiplexer; power reduction; processor design; transmission gate logic; Adders; Logic gates; Multiplexing; Program processors; Signal processing; Transistors; 8TFA; ALU; Pass transistor logic; Transmission gate;
Conference_Titel :
Advances in Engineering, Science and Management (ICAESM), 2012 International Conference on
Conference_Location :
Nagapattinam, Tamil Nadu
Print_ISBN :
978-1-4673-0213-5