Title :
Designing of SET based 5-stage and 3-stage ring oscillator with RC phase delay circuit
Author :
Pak, A. Lourts Dee ; Hulipalla, Likhitha D. ; Shaik, Chand Basha ; Chaitra, S.K.
Author_Institution :
VLSI System Design, M. S. Ramaiah School of Advanced Studies, Bangalore, India
Abstract :
In future, the necessity of ultra low power based circuit will be increased and physical channel length of the device will be decreased. In nanometer regime, CMOS based circuits may not be used due to problem in its fundamental material. To achieve ultra low power device in nanometer region can be obtained by utilizing Single Electron Transistor (SET). In most of the electronic circuits, clocks are playing a critical role to operate the device with the help of oscillatory circuit and cause the more power dissipation. In this paper, we designed the 5stage and 3stage ring oscillator to generate high frequencies like 45GHz and 70 GHz respectively with ultra low power by means of SET and result obtained as 44.6 GHz and 68.4 GHz respectively. Resistor and capacitor based phase shift delay circuit has been used for phase shifting operation at each stage of the design.
Keywords :
Electronic circuits; Electronic mail; Frequency measurement; Nanoscale devices; Power dissipation; Ring oscillators; Tunneling; RO with RC phase shift circuit; Ring oscillator; Single Electron Transistor;
Conference_Titel :
Advances in Engineering, Science and Management (ICAESM), 2012 International Conference on
Conference_Location :
Nagapattinam, Tamil Nadu, India
Print_ISBN :
978-1-4673-0213-5