DocumentCode
562793
Title
A simple SET-MOS universal hybrid circuit for realization of all basic logic functions
Author
Samanta, Debasis ; Sarkar, Subir Kumar
Author_Institution
Centre for Educ. Technol., Indian Inst. of Technol., Kharagpur, India
fYear
2012
fDate
30-31 March 2012
Firstpage
336
Lastpage
339
Abstract
Hybridization of Single Electron Transistor (SET) with CMOS technology offers new functionalities, which are very difficult to achieve either by pure SET or by pure CMOS approaches. This paper, for the first time, proposes the realization of all the basic logic gates with the help of a single SET-MOS hybrid logic circuit. The basic aim of the present work is to achieve a SET-CMOS integration based universal logic gate which is capable of exhibiting all basic logic functions under relevant situations. The operation of basic logic gates are verified using simulation. A necessary and novel CAD framework has been developed for hybrid SET-CMOS co-simulation, which employs conventional SPICE for MOS devices along with Monte Carlo simulation for SET devices.
Keywords
CMOS integrated circuits; logic gates; CAD framework; CMOS technology; MOS devices; Monte Carlo simulation; SET device; SET-CMOS integration; SET-MOS universal hybrid circuit; SPICE; basic logic function; basic logic gates; hybrid SET-CMOS cosimulation; hybridization; single SET-MOS hybrid logic circuit; single electron transistor; universal logic gate; CMOS integrated circuits; CMOS technology; Circuit faults; Logic gates; Out of order; SPICE; Semiconductor device modeling; Hybridization; Monte Carlo simulation; SET-CMOS; SPICE; Single Electron Transistor;
fLanguage
English
Publisher
ieee
Conference_Titel
Advances in Engineering, Science and Management (ICAESM), 2012 International Conference on
Conference_Location
Nagapattinam, Tamil Nadu
Print_ISBN
978-1-4673-0213-5
Type
conf
Filename
6216026
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