A model for the accurate prediction of the current voltage behavior of ion-implanted MOS transistors at low drain voltages

The increased use in production LSI circuits of ion implantation, in particular, the use of the depletion load transistor, has prompted re-examination of conventional MOS theory. For enhancement/depletion mode circuits, discrepancies between measured and predicted characteristics appear due to the inadequacy of the conventional depletion load device model. Calculations are described for p-channel depletion load transistors. Comparison of I_D-V_G characteristics to experiment are given for several energies and doses. A voltage dependent shift in the I_D-V_G curves is shown to be a direct consequence of hole degeneracy.