• DocumentCode
    563411
  • Title

    Geometric and temperature compensating effects of the MOS enhanced capacitor

  • Author

    Lattin, William ; DeMassa, Tom

  • Author_Institution
    Semicond. Products Div., Motorola Inc., Phoenix, AZ, USA
  • fYear
    1974
  • fDate
    9-11 Dec. 1974
  • Firstpage
    50
  • Lastpage
    52
  • Abstract
    Geometric and temperature effects of the MOS enhanced capacitor are shown to be valuable for MOS D to A conversion and for temperature compensation of MOS oscillators. It is also shown that these effects may be deleterious in one transistor memory and high speed bootstrap circuits.
  • Keywords
    MOS capacitors; bootstrap circuits; compensation; oscillators; transistors; MOS enhanced capacitor; MOS oscillators; geometric effect; high speed bootstrap circuits; temperature compensating effects; transistor memory; Abstracts; Capacitance; Capacitors; Logic gates; Random access memory; Silicon; Standards;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 1974 International
  • Conference_Location
    Washington, DC
  • ISSN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.1974.6219609
  • Filename
    6219609
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=563411