• DocumentCode
    563466
  • Title

    GIMIC-O - A low cost non-epitaxial bipolar LSI technology suitable for application to TTL circuits

  • Author

    Panousis, P.T. ; Pritchett, R.L.

  • Author_Institution
    Bell Telephone Labs., Inc., Allentown, PA, USA
  • fYear
    1974
  • fDate
    9-11 Dec. 1974
  • Firstpage
    515
  • Lastpage
    518
  • Abstract
    A bipolar technology has been developed which is directed toward low power LSI applications at a wafer processing cost below those of MOS technologies. The structure uses the basic concepts of the triple diffused technology which requires neither an epitaxial nor buried layer; however, ion implantation of both the collector and base provide parameter control not possible with triple diffusion. The use of an ion implanted self-isolated collector region which is lightly doped provides small size and low capacitance; this region is also used for the formation of Schottky diodes. Well controlled, ion implanted resistors can be fabricated in both the base (p-type - 600Ω/□) and collector (n-type -700Ω/□) and substrate PNP´s with β ~ 10 are also available. The transistors show a peak fT = 1GHz which makes them suitable even for high speed applications. At present the technology is finding extensive use in low power Schottky clamped TTL circuits where it meets all the standard circuit requirements for that family.
  • Keywords
    Schottky diodes; UHF integrated circuits; bipolar integrated circuits; bipolar logic circuits; buried layers; ion implantation; large scale integration; low-power electronics; resistors; semiconductor epitaxial layers; transistor-transistor logic; GIMIC-O; MOS technology; Schottky diodes; TTL circuits; bipolar technology; buried layer; epitaxial layer; frequency 1 GHz; guard-ring isolated monolithic integrated circuit; ion implanted resistors; ion implanted self-isolated collector region; low cost nonepitaxial bipolar LSI technology; low power LSI applications; low power Schottky clamped TTL circuits; triple diffused technology; wafer processing; Capacitance; Large scale integration; Lead; Schottky diodes; Substrates; Surface treatment; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 1974 International
  • Conference_Location
    Washington, DC
  • ISSN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.1974.6219674
  • Filename
    6219674