Title :
New isolation technique for a low frequency low noise monolithic L.I.C.
Author :
Koji, Tetsu ; Konno, Shigeyoshi
Author_Institution :
Semicond. Div., Nippon Electr. Co., Ltd., Kawasaki, Japan
Abstract :
The realization of an ultra low noise Monolithic Linear Integrated Circuits (M.L.I.C) with a 3 dB noise figure at 10 Hz has been made possible by a new isolation technique under low temperature. The major cause of inferior noise performance of a transistor in the M.L.I.C. was found to be due to contaminants or diffusion - induced dislocations associated with high temperature (1250°C) impurity diffusion for an isolation. Elimination of the high temperature isolation process from the wafer processing has been attempted. Thus a new low temperature process, involving forming a porous silicon instead of diffused isolation, has been successfully achieved.
Keywords :
diffusion; monolithic integrated circuits; semiconductor technology; transistors; MLIC; impurity diffusion; isolation technique; low frequency low noise monolithic LIC; low temperature process; porous silicon; temperature 1250 degC; transistor; ultra low noise monolithic linear integrated circuits; wafer processing; Abstracts; Fabrication; Integrated circuits; Noise; Pollution measurement; Silicon; Substrates;
Conference_Titel :
Electron Devices Meeting (IEDM), 1974 International
Conference_Location :
Washington, DC
DOI :
10.1109/IEDM.1974.6219763