Crystal oscillator with dual amplitude stabilization feedback loop

Author

Siwiec, Krzysztof

Author_Institution

Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Warsaw, Poland

fYear

2012

fDate

24-26 May 2012

Firstpage

231

Lastpage

234

Abstract

In this paper crystal oscillator realized in 90 nm Low Leakage UMC CMOS technology is presented. It is based on the Pierce architecture and uses dual feedback loop to limit the amplitude and generate bias point. Dual feedback architecture allows to achieve almost rail to rail signal with low harmonic levels for wide range of supply voltage. Both of those features have positive impact on phase noise level. The oscillator was designed to work with 16 MHz crystal. It can work with supply voltages from 0.6 to 1.8 V and consumes 78.4μA for 1.2 V supply. In typical case phase noise for 1.2 V supply voltage is -160 dBc/Hz at 10 kHz offset.

Keywords

CMOS analogue integrated circuits; crystal oscillators; feedback oscillators; Pierce architecture; crystal oscillator; current 78.4 muA; dual amplitude stabilization feedback loop; frequency 16 MHz; low leakage UMC CMOS technology; phase noise level; size 90 nm; supply voltage; voltage 0.6 V to 1.8 V; Integrated circuits; Crystal oscillator; amplitude stabilization; quartz resonator;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed Design of Integrated Circuits and Systems (MIXDES), 2012 Proceedings of the 19th International Conference

Conference_Location

Warsaw

Print_ISBN

978-1-4577-2092-5

Type

conf

Filename

6225749