Verilog-a compact semiconductor device modelling and circuit macromodelling with the QucsStudio-ADMS “turn-key” modelling system

The Verilog-A “Analogue Device Model Synthesizer” (ADMS) has in recent years become an established modelling tool for GNU General Public License circuit simulator development. Qucs and ngspice being two examples of open source circuit simulators that use ADMS. This paper presents a “turn-key” compact device modelling and circuit macromodelling system based on ADMS and implemented in the QucsStudio circuit design, simulation and manufacturing environment. A core feature of the new system is a modelling procedure which does not require users to manually patch the circuit simulator C++ code. At the start of a QucsStudio simulation the software automatically detects any changes in Verilog-A model code, re-compiling and dynamically linking the modified code to the body of the QucsStudio code. The inherent flexibility of the “turn-key” system encourages rapid experimentation with analogue and RF compact device models. In this paper QucsStudio “turn-key” modelling is illustrated by the design of a single stage RF amplifier circuit.