Effects of thermal interface materials (solders) on thermal performance of a microelectronic package

The increase in thermal failures associated with the operations of microelectronic devices at elevated temperature has accounted for some of their recent reliability concerns. The removal of heat with heat sink from chip level devices used in microelectronics assembly such as laptop computers is the key to achieving high reliability. Normally, when a heat sink is mounted on the chip level device, the surface roughness which exists at the interface is filled with air and it impacts heat transfer across the boundaries. Thermal interface materials (TIMs) are used to eliminate the interstitial air gaps from the interface by conforming to the topography of the surfaces in contact. In this paper, steady state thermal analysis built into finite element method was employed. The architecture and thermal conductivity of solder TIMs were varied to investigate their impact on thermal resistance of the TIM which in turn influences the thermal performance of the electronic package. The results obtained show that a solder thermal conductivity and bond line thickness less than 0.1 mm does not have a great impact on the thermal performance of the microelectronic device. In addition, a 75% and above TIM coverage area is required for optimum thermal performance. It is anticipated that the results will assist design engineers involved in setting standard for TIM architecture and thermal conductivity.