DocumentCode :
565112
Title :
Security analysis of logic obfuscation
Author :
Rajendran, Jeyavijayan ; Pino, Youngok ; Sinanoglu, Ozgur ; Karri, Ramesh
fYear :
2012
fDate :
3-7 June 2012
Firstpage :
83
Lastpage :
89
Abstract :
Due to globalization of Integrated Circuit (IC) design flow, rogue elements in the supply chain can pirate ICs, overbuild ICs, and insert hardware trojans. EPIC [1] obfuscates the design by randomly inserting additional gates; only a correct key makes the design to produce correct outputs. We demonstrate that an attacker can decipher the obfuscated nctlist, in a time linear to the number of keys, by sensitizing the key values to the output. We then develop techniques to fix this vulnerability and make obfuscation truly exponential in the number of inserted keys.
Keywords :
industrial property; integrated circuit design; logic circuits; logic design; security of data; IC piracy; hardware trojans; inserted keys; integrated circuit design flow; logic obfuscation; obfuscated netlist; security analysis; supply chain; Force; Hardware; Integrated circuits; Interference; Logic gates; Reverse engineering; Security; IP protection; Logic obfuscation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
ISSN :
0738-100X
Print_ISBN :
978-1-4503-1199-1
Type :
conf
Filename :
6241494
Link To Document :
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