DocumentCode :
565115
Title :
Transformer: A functional-driven cycle-accurate multicore simulator
Author :
Zhenman Fang ; Qinghao Min ; Keyong Zhou ; Yi Lu ; Yibin Hu ; Weihua Zhang ; Haibo Chen ; Jian Li ; Binyu Zang
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear :
2012
fDate :
3-7 June 2012
Firstpage :
106
Lastpage :
114
Abstract :
Full-system simulators are extremely useful in evaluating design alternatives for multicore. However, state-of-the-art multicore simulators either lack good extensibility due to their tightly-coupled design between functional model (FM) and timing model (TM), or cannot guarantee cycle-accuracy. This paper conducts a comprehensive study on factors affecting cycle-accuracy and uncovers several contributing factors ignored before. Based on the study, we propose a loosely-coupled functional-driven full-system simulator for multicore, namely Transformer. To ensure extensibility and cycle-accuracy, Transformer leverages an architecture-independent interface between FM and TM and uses a lightweight scheme to detect and recover from execution divergence between FM and TM. Based on Transformer, a graduate student only needs to write about 180 lines of code and takes about two months to extend an X86 functional model (QEMU) in Transformer. Moreover, the loosely-coupled design also removes the complex interaction between FM and TM and opens the opportunity to parallelize FM and TM to improve performance. Experimental results show that Transformer achieves an average of 8.4% speedup over GEMS while guaranteeing the cycle-accuracy. A further parallelization between FM and TM leads to 35.3% speedup.
Keywords :
multiprocessing systems; parallel architectures; performance evaluation; FM; GEMS; QEMU; TM; Transformer; X86 functional model; architecture-independent interface; execution divergence; functional driven cycle accurate multicore simulator; lightweight scheme; loosely coupled functional driven full system simulator; parallelization; timing model; Analytical models; Frequency modulation; Instruction sets; Multicore processing; Pipelines; Registers; Timing; Extension; Full-system; Functional-driven; Multicore simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
ISSN :
0738-100X
Print_ISBN :
978-1-4503-1199-1
Type :
conf
Filename :
6241497
Link To Document :
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