DocumentCode :
565234
Title :
Improving gate-level simulation accuracy when unknowns exist
Author :
Chang, Kai-Hui ; Browy, Chris
Author_Institution :
Avery Design Syst., Inc., Andover, MA, USA
fYear :
2012
fDate :
3-7 June 2012
Firstpage :
936
Lastpage :
940
Abstract :
Unknown values (Xs) may exist in a design due to uninitialized registers or blocks that are powered down. Due to X-pessimism in gate-level logic simulation, such Xs cannot be handled correctly, producing false Xs that result in inaccurate simulation values. To improve gate-level simulation accuracy when Xs exist, we first trace the fan-in cone of Xs to check whether they are real. For the Xs that are not real, we extract small sub-circuits responsible for creating the false Xs. We then generate auxiliary code to repair gate-level simulation by replacing the Xs with the correct values. Our experimental results on commercial designs show that the proposed methods are both effective and efficient.
Keywords :
logic design; logic simulation; X-pessimism; commercial designs; correctness verification; design netlists; gate-level logic simulation accuracy improvement; Algorithm design and analysis; Analytical models; Boolean functions; Logic gates; Maintenance engineering; Registers; Simulation; Formal methods; Gate-level logic simulation; X-pessimism;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
ISSN :
0738-100X
Print_ISBN :
978-1-4503-1199-1
Type :
conf
Filename :
6241616
Link To Document :
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