• DocumentCode
    565254
  • Title

    Timing analysis with nonseparable statistical and deterministic variations

  • Author

    Zolotov, Vladimir ; Sinha, Debjit ; Hemmett, Jeffrey ; Foreman, Eric ; Visweswariah, Chandu ; Xiong, Jinjun ; Leitzen, Jeremy ; Venkateswaran, Natesan

  • Author_Institution
    Thomas J. Watson Res. Center, IBM, Yorktown Heights, NY, USA
  • fYear
    2012
  • fDate
    3-7 June 2012
  • Firstpage
    1061
  • Lastpage
    1066
  • Abstract
    Statistical static timing analysis (SSTA) is ideal for random variations but is not suitable for environmental variations like Vdd and temperature. SSTA uses statistical approximation, according to which circuit timing is predicted accurately only for highly probable combinations of variational parameters. SSTA is not able to handle accurately deterministic sources of variation like supply voltage. This paper presents a novel technique for modeling nonseparable deterministic and statistical variations in single timing run.
  • Keywords
    VLSI; statistical analysis; timing circuits; SSTA; VLSI circuits; circuit timing; deterministic variations; environmental variations; nonseparable statistical variation; statistical approximation; statistical static timing analysis; Computational modeling; Delay; Integrated circuit modeling; Interpolation; Sensitivity; Static Timing; Statistical Timing; Variability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
  • Conference_Location
    San Francisco, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-4503-1199-1
  • Type

    conf

  • Filename
    6241636