DocumentCode :
565292
Title :
Instruction scheduling for reliability-aware compilation
Author :
Rehman, Semeen ; Shafique, Muhammad ; Henkel, Jörg
Author_Institution :
Dept. of Embedded Syst., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany
fYear :
2012
fDate :
3-7 June 2012
Firstpage :
1288
Lastpage :
1296
Abstract :
An instruction scheduling technique is presented that targets at improving the reliability of a software program given a user-provided tolerable performance overhead. A look-ahead-based heuristic schedules instructions by evaluating the reliability of dependent instructions while reducing the impact of spatial and temporal vulnerabilities of various processor components. Our reliability-driven instruction scheduler (implemented into the GCC compiler) provides on average a 22% reduction of program failures compared to state-of-the-art.
Keywords :
instruction sets; program compilers; scheduling; software reliability; GCC compiler; dependent instruction reliability; instruction scheduling technique; look-ahead-based heuristic schedules instructions; program failure reduction; reliability-aware compilation; reliability-driven instruction scheduler; software program reliability; spatial vulnerability reduction; temporal vulnerability reduction; Pipelines; Processor scheduling; Registers; Schedules; Software; Software reliability; Reliability; code generation; dependability; embedded systems; instruction scheduling; instruction vulnerability estimation; reliability estimation; reliable software; technology scaling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
ISSN :
0738-100X
Print_ISBN :
978-1-4503-1199-1
Type :
conf
Filename :
6241675
Link To Document :
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