Title :
Statistical analysis of Random Telegraph Noise reduction effect by separating channel from the interface
Author :
Yonezawa, A. ; Teramoto, A. ; Kuroda, R. ; Suzuki, H. ; Sugawa, S. ; Ohmi, T.
Author_Institution :
Grad. Sch. of Eng., Tohoku Univ., Sendai, Japan
Abstract :
Random Telegraph Noise (RTN) has become one of the most important problems in the continuous downscaling of CMOS circuitry. We demonstrate the RTN reduction by introducing buried channel (BC) MOSFETs and discusse its reduction mechanism. Because of the larger distance between channel and SiO2/Si interface, it is more difficult for conduction carriers to be captured in and emitted from the insulator. The effective coulomb blockade radius of charged traps is small since the channel is separated from the SiO2/Si interface and locates widely and apart from the Si/SiO2 interface. Hence, the impact of charged traps is small, resulting in a decrease of probability of RTN, especially RTN with large amplitude. The separation of trap-channel distance and wider channel width are the key parameters to suppress the transition probability between the trap and channel and the influence of trapped charge to the channel.
Keywords :
CMOS integrated circuits; MOSFET; integrated circuit noise; statistical analysis; CMOS circuitry; RTN reduction; SiO2-Si; buried channel MOSFET; random telegraph noise reduction effect; statistical analysis; transition probability; trap-channel distance; trapped charge; Current measurement; Insulators; Logic gates; MOSFETs; Noise; Silicon; Standards; Buried Channel (BC); MOSFET; Random Telegraph Noise (RTN); Statistical analysis;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2012 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4577-1678-2
Electronic_ISBN :
1541-7026
DOI :
10.1109/IRPS.2012.6241809