Effects of 3-D stacked vector cache on energy consumption

To realize a high computational efficiency, a 3-D stacked chip multi-vector processor (CMVP) has been proposed. However, the 3-D stacked CMVP has not been evaluated well in terms of energy consumption. Therefore, to clarify the potential of the 3-D stacked CMVP, this paper evaluates and analyzes the energy consumption of the 3-D stacked CMVP using real scientific applications. Especially, this paper focuses on the energy reduction effects given by a large scale vector cache, which can be realized by 3-D die stacking technologies. The evaluation results show the vector cache on the 3-D stacked CMVP has enough potential to achieve a low energy and high performance processing of the cutting edge scientific applications.