DocumentCode :
568581
Title :
Synthesis of Multithreshold Threshold Gates
Author :
Nikodem, Maciej ; Bawiec, Marek A. ; Biernat, Janusz
Author_Institution :
Inst. of Comput. Eng., Control & Robot., Wroclaw Univ. of Technol., Wrocław, Poland
fYear :
2012
fDate :
19-21 Aug. 2012
Firstpage :
94
Lastpage :
99
Abstract :
This paper presents novel synthesis algorithm capable of generating Multithreshold Threshold Gate (MTTG) structure for arbitrary Boolean function. Algorithm draws from dedicated efficient threshold decomposition procedure that represents Boolean function as a min/max composition of threshold functions. Since the proposed threshold decomposition procedure outputs minimal number of thresholds therefore the resulting gate is compact - for k-threshold n-input Boolean function at most (k+1)(n+1) NDR elements in a (k+1)-level gate structure, and (k+1)n transistors are required.
Keywords :
Boolean functions; logic gates; network synthesis; (k+1)(n+1) NDR element; (k+1)-level gate structure; (k+1)n transistor; arbitrary Boolean function; k-threshold n-input Boolean function; min-max composition; multithreshold threshold gate synthesis; threshold decomposition procedure; threshold function; Boolean functions; Complexity theory; Computational modeling; Integrated circuit modeling; Logic gates; Periodic structures; Transistors; gate structure; multithreshold threshold gate; negative differential resistance; synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI (ISVLSI), 2012 IEEE Computer Society Annual Symposium on
Conference_Location :
Amherst, MA
ISSN :
2159-3469
Print_ISBN :
978-1-4673-2234-8
Type :
conf
DOI :
10.1109/ISVLSI.2012.58
Filename :
6296455
Link To Document :
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